(A) Field of the Invention
The present invention relates to a heating apparatus for semiconductor devices, and more particularly, to a heating apparatus with a design for a removable carrier for device-under-test (DUT) allowing initiation of a burn-in or reliability test for a new carrier loaded with semiconductor devices while other carriers with semiconductor devices is undergoing burn-in or reliability test in the same heating apparatus without having to open the heating apparatus which can impact the temperature of the devices under test.
(B) Description of the Related Art
Semiconductor circuits are initially manufactured as wafers. A circular wafer made of a semiconductor material such as silicon is formed with a plurality of individual integrated circuits called dies. The first level of quality assurance will be to ensure that all component types that formed the integrated circuits can perform within specifications at the predefined lifetime. This is known as device reliability. The component types include transistors (Metal Oxide Semiconductor Field Effect Transistors, MOSFETs), gate oxide, and metal or polysilicon interconnects. Due to the high volume of reliability data required which is usually collected over long stress time, these devices are diced and packaged into dual-in-line packaged and tested over high temperature condition in a heating apparatus. The next level of quality assurance is to ensure that all infant failure is working integrated circuits are eliminated through a burn-in test before shipping to customers. The integrated circuits formed on the wafer are cut so as to separate the dies from each other. Each die is then assembled into a semiconductor package with bond wires connecting the bond pads of the die with the pins of the package. Once the die is assembled in a package it undergoes a burn-in test to ensure the quality and reliability of semiconductor devices. It is absolutely necessary to conduct the burn-in test, which is a screening test held under high temperatures in a heating apparatus in order to eliminate early failures before shipment.
U.S. Pat. No. 5,574,384 discloses a heating apparatus with a combined board, which together is capable of transmitting signals to the semiconductor device under test at a super high speed and of being connected to a large number of terminals. The carrier modules consist of combined board, which includes a burn-in or load board, carrier of the packaged integrated circuits, and a driver board. The burn-in board has sockets on a first surface for accepting the semiconductor devices and first terminals extending from the sockets to protrude from a first backside of the burn-in board. The driver board has a second surface carrying an electronic circuit to drive the semiconductor devices and a second backside with second terminals for connecting the electronic circuit to the first terminals.
U.S. Pat. No. 5,327,075 discloses a burn-in apparatus includes a burn-in test chamber for accommodating a plurality of semiconductor devices to be tested. In particular, the burn-in apparatus also includes measuring devices for detecting electric characteristics of temperature sensors built in the respective semiconductor devices to individually measure junction temperatures of the semiconductor chips, and laser-emitting mechanisms or electric heating members. The laser-emitting mechanisms or the heating members are controlled by control units, based on outputs of the measuring devices. Thus, the junction temperatures are maintained in a set junction temperature range, and the screening accuracy can be improved.
U.S. Pat. No. 7,114,556 discloses a burn-in heating apparatus with heat exchanger that can accommodate a high power integrated circuit chip for burn-in temperature stressing. The heat exchanger includes a heat sink having a chip engaging surface that is adapted to engage a surface of the chip. A liquid layer fills a heat exchange gap between the surface of the chip and the chip engaging surface of the heat sink. The liquid layer provides a low thermal resistance juncture between the chip engaging surface of the heat sink and the surface of the chip, which allows for greater heat transfer between the two surfaces.